Pad roughness effects on the planarization and material removal rate in CMP processes

Chemical-mechanical planarization (CMP) is one of the most demanding process steps in interconnect integration. Therefore we systematically investigate the planarization of adjacent line-space structures, which emulate IC layouts, as a function of the conditioning process. The interrelation between conditioning, pad roughness and planarization is evaluated by a novel pad roughness characterization methodology. Using this approach, tribological parameters can be correlated to important CMP properties like global step reduction and blanket removal rate, enabling planarization improvements for patterned dielectrics and metals.