Title :
Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks
Author :
Lee, Jae W. ; Ng, Man Cheuk ; Asanovic, Krste
Author_Institution :
Comput. Sci. & Artificial Intell. Lab., Massachusetts Inst. of Technol., Cambridge, MA
Abstract :
Future chip multiprocessors (CMPs) may have hundreds to thousands of threads competing to access shared resources, and will require quality-of-service (QoS) support to improve system utilization. Although there has been significant work in QoS support within resources such as caches and memory controllers, there has been less attention paid to QoS support in the multi-hop on-chip networks that will form an important component in future systems. In this paper we introduce globally-synchronized frames (GSF), a framework for providing guaranteed QoS in on-chip networks in terms of minimum bandwidth and a maximum delay bound. The GSF framework can be easily integrated in a conventional virtual channel (VC) router without significantly increasing the hardware complexity. We rely on a fast barrier network, which is feasible in an on-chip environment, to efficiently implement GSF. Performance guarantees are verified by both analysis and simulation. According to our simulations, all concurrent flows receive their guaranteed minimum share of bandwidth in compliance with a given bandwidth allocation. The average throughput degradation of GSF on a 8times8 mesh network is within 10% compared to the conventional best-effort VC router in most cases.
Keywords :
network routing; network-on-chip; chip multiprocessors; fast barrier network; globally-synchronized frames; guaranteed quality-of-service; multihop on-chip networks; virtual channel router; Bandwidth; Control systems; Hardware; Network-on-a-chip; Performance analysis; Quality of service; Spread spectrum communication; System-on-a-chip; Virtual colonoscopy; Yarn; chip multiprocessors; interconnects; multicores; on-chip network; quality-of-service; resource management; router; software interface;
Conference_Titel :
Computer Architecture, 2008. ISCA '08. 35th International Symposium on
Conference_Location :
Beijing
Print_ISBN :
978-0-7695-3174-8
DOI :
10.1109/ISCA.2008.31