Investigation of local stress around TSVs by micro-Raman spectroscopy and finite element simulation

Author

Le Texier, F. ; Mazuir, J. ; Su-Yin, M. ; Saadaoui, M. ; Liotard, J. -L ; Inal, K.

Author_Institution

PS2 Dept., ENSM.SE, Gardanne, France

fYear

2011

fDate

8-12 May 2011

Firstpage

1

Lastpage

3

Abstract

Stress concentration in through-silicon via (TSV) is studied by a calibrated micro-Raman spectroscopy (μRS) and correlated with numerical simulation. Results show that stress concentration is in transverse direction and it depends on the ratio of via diameter to via spacing. Further investigations on bended TSV lined with copper revealed that the stress level is lower than the one in TSV without copper. Chip-to-wafer 3D-stacking using microinserts thermocompression bonding shows that the 50 μm thick TSVs have negligible mechanical stress effect.

Keywords

Raman spectroscopy; finite element analysis; tape automated bonding; three-dimensional integrated circuits; TSV; chip-to-wafer 3D-stacking; finite element simulation; micro-Raman spectroscopy; microinserts thermocompression bonding; stress concentration; through-silicon via; Copper; Numerical models; Silicon; Stacking; Stress; Three dimensional displays; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference and 2011 Materials for Advanced Metallization (IITC/MAM), 2011 IEEE International

Conference_Location

Dresden

ISSN

pending

Print_ISBN

978-1-4577-0503-8

Type

conf

DOI

10.1109/IITC.2011.5940351

Filename

5940351