Title :
Fault diagnosis of TSV-based interconnects in 3-D stacked designs
Author :
Rajski, J. ; Tyszer, J.
Author_Institution :
Mentor Graphics Corp., Wilsonville, OR, USA
Abstract :
Through-silicon vias (TSVs) are crucial elements of 3-D bonded integrated circuits. Since they connect different layers of 3-D stacks, their proper operation is an essential prerequisite for the system function. This paper describes a procedure for deriving fault diagnosis test sequences to identify single and multiple defective TSVs. Additional experimental results obtained for pseudorandom patterns illustrate feasibility and robustness of the proposed test schemes in terms of their detection and diagnostic capabilities and are reported herein.
Keywords :
fault diagnosis; integrated circuit design; integrated circuit interconnections; three-dimensional integrated circuits; 3D bonded integrated circuits; 3D stacked designs; TSV-based interconnects; detection capabilities; diagnostic capabilities; fault diagnosis test sequences; pseudorandom patterns; single defective through-silicon vias; single multiple through-silicon vias; Circuit faults; Clocks; Fault diagnosis; Legged locomotion; Registers; Silicon; Through-silicon vias;
Conference_Titel :
Test Conference (ITC), 2013 IEEE International
Conference_Location :
Anaheim, CA
DOI :
10.1109/TEST.2013.6651894
