Spintronic Device Based Non-volatile Low Standby Power SRAM

SRAM is an indispensable component in modern microprocessors to store copies of the most frequently used data from the main memory. The high write/read speed of SRAM assures the desired memory throughput required by the internal high operating frequency of the microprocessor. However SRAM memory is volatile, which causes some drawbacks for computer systems such as high standby power and low data security etc. Spintronic devices as magnetic tunnel junction (MTJ) features non-volatility, high write/read speed and exhibits good interface with CMOS. They have therefore the potential to overcome the SRAM limitations. In this paper, we present a Non-Volatile SRAM that combines MTJ devices with classical SRAM. Used in a microprocessor, it can ldquosnapshotrdquo the currently-executing program and data from SRAM to the relating MTJ cells at regular intervals. If its power supply is interrupted, this self-checkpointing processor can near-instantly (~700 ps) restore its state from the last checkpoint, allowing it to resume execution with little loss of progress. The non-volatility of MTJ and the high data recovering speed allows the NVSRAM to consume nearly zero standby power.