Title :
A fast optimal CMOS full adder
Author :
Khalid, A. T M Shafiqul
Author_Institution :
Ascent Solution Inc., Dayton, OH, USA
Abstract :
Two CMOS full adders have been developed in this paper based on the transmission function theory. Proposed adders are comparable to conventional design in terms of number of gates. The design also gives better operational speed over the Zhuang-Wu design. HSPICE simulation proves the functionality of the designs
Keywords :
CMOS logic circuits; SPICE; adders; circuit CAD; circuit analysis computing; circuit optimisation; digital simulation; integrated circuit design; logic CAD; CMOS full adder; HSPICE simulation; design functionality; operational speed; transmission function theory; Added delay; Arithmetic; CMOS technology; Costs; Tin; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1996., IEEE 39th Midwest symposium on
Conference_Location :
Ames, IA
Print_ISBN :
0-7803-3636-4
DOI :
10.1109/MWSCAS.1996.594042
