Heterogeneous integration of vaporliquidsolid grown silicon microprobe arrays/(111) and MOSFETs/(100) using a silicon on insulator substrate

Herein we report heterogeneous integration of vertically-aligned silicon (Si) microprobe arrays/(111) with MOSFET circuits/(100) by IC processes and subsequent selective vapor-liquid-solid (VLS) growth of silicon. A hybrid silicon-on-insulator (SOI) substrate with a (100) topSi/buried oxide (BOX)/(111) handle-Si system was utilized for the integration technique. MOSFETs were fabricated on (100) topSi, and VLS-Si probe arrays were assembled at the exposed (111) handle-Si wafer where the (100) top-Si region was removed by anisotropic etching. The different Si layers of the MOSFETs and probes were electrically connected by a 3D metallization technique. Additionally, we investigated the electrical properties of 3D metallization and the MOSFETs. The results indicate potential for heterogeneous integration of VLS probes/(111) and MOSFETs/(100). The proposed technique also promises further integrations of numerous microdevices/different species of substrates and microelectronics/(100) on the same chip.