Title :
622 Mb/s 8×8 shared multibuffer ATM switch with hierarchical queueing and multicast functions
Author :
Yamanaka, H. ; Saito, H. ; Yamada, H. ; Tsuzuki, M. ; Kohama, S. ; Ueda, H. ; Kondoh, H. ; Matsuda, Y. ; Oshima, K.
Author_Institution :
Comm. Syst. Lab., Mitsubishi Electr. Corp., Kanagawa, Japan
fDate :
29 Nov-2 Dec 1993
Abstract :
A new ATM switch architecture, named the shared multibuffer architecture, features great advantages in the access speed, overall size of the buffer memories, and the cell loss performance. We have developed a 622 Mb/s 8×8 shared multibuffer ATM switch with multicast and hierarchical queueing functions to accommodate 156 Mb/s, 622 Mb/s and 2.4 Gb/s interfaces. Implementation of the shared multibuffer ATM switch is described with respect to four sorts of 0.8-μm BiCMOS LSIs and an ATM switch board. The switch board consists of four aligner-LSIs, nine buffer-LSIs and one control-LSI (or control/type 2-LSI). Possible applications to an ATM access system and a 2.4 Gb/s ATM loop system are also discussed
Keywords :
B-ISDN; BiCMOS integrated circuits; asynchronous transfer mode; buffer circuits; electronic switching systems; large scale integration; queueing theory; 0.8 micron; 156 Mbit/s; 2.4 Gbit/s; 622 Mbit/s; ATM loop system; ATM switch board; B-ISDN; BiCMOS LSI; access speed; aligner-LSI; buffer memories size; buffer-LSI; cell loss performance; control-LSI; hierarchical queueing; multicast functions; shared multibuffer ATM switch; Asynchronous transfer mode; B-ISDN; BiCMOS integrated circuits; Communication equipment; Communication switching; Laboratories; Large scale integration; Performance loss; Switches; Switching systems;
Conference_Titel :
Global Telecommunications Conference, 1993, including a Communications Theory Mini-Conference. Technical Program Conference Record, IEEE in Houston. GLOBECOM '93., IEEE
Conference_Location :
Houston, TX
Print_ISBN :
0-7803-0917-0
DOI :
10.1109/GLOCOM.1993.318319
