DocumentCode :
2012085
Title :
Charge based testing (CBT) of submicron CMOS SRAMs
Author :
Rosales, M. ; De Paùl, I. ; Segura, J. ; Hawkins, C.F. ; Soden, J.
Author_Institution :
Dept. of Phys., Balearic Islands Univ., Palma de Mallorca, Spain
fYear :
2000
fDate :
2000
Firstpage :
57
Lastpage :
61
Abstract :
A transient current testing technique that computes the charge delivered to the circuit during the transient circuit operation is analyzed. The method is applied to 0.5 μm CMOS SRAMs with 1.5 million transistors that passed various logic tests. Results show that Charge Based Testing (CBT) can be used to test submicron ICs and can be applied to non fully static parts
Keywords :
CMOS memory circuits; SRAM chips; fault location; integrated circuit testing; logic testing; 0.5 micron; charge based testing; non fully static parts; static RAM chips; submicron CMOS SRAMs; submicron IC testing; transient circuit operation; transient current testing technique; Circuit testing; Current measurement; Current supplies; Failure analysis; Logic testing; Physics; Random access memory; Shape measurement; Time measurement; Transient analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect Based Testing, 2000. Proceedings. 2000 IEEE International Workshop on
Conference_Location :
Montreal, Que.
Print_ISBN :
0-7695-0637-2
Type :
conf
DOI :
10.1109/DBT.2000.843691
Filename :
843691
Link To Document :
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