Title :
Non-stalling counterflow architecture
Author :
Miller, Michael F. ; Janik, Kennneth J. ; Lu, Shih-Lien
Author_Institution :
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
Abstract :
The counterflow pipeline concept was originated by Sproull et al.(1994) to demonstrate the concept of asynchronous circuits. This architecture relies on distributed decision making and localized clocking and data movement. We have taken these ideas and reformulated them into a substantially faster more scalable architecture that has the same distributed decision making and locality for clocking and data, but adds very aggressive speculation, no stalls, and other desirable characteristics. A high level Java simulator has been built to explore the design tradeoffs and evaluate performance
Keywords :
parallel architectures; performance evaluation; pipeline processing; CFPP; Java simulator; asynchronous circuits; counterflow architecture; counterflow pipeline; data movement; dataflow; design tradeoffs; distributed decision making; localized clocking; multithreading; performance; pipeline; scalable architecture; virtual register; Computer aided instruction; Computer architecture; Costs; Data engineering; Decoding; Global communication; Pipelines; Radio frequency; Radiofrequency identification; System recovery;
Conference_Titel :
High-Performance Computer Architecture, 1998. Proceedings., 1998 Fourth International Symposium on
Conference_Location :
Las Vegas, NV
Print_ISBN :
0-8186-8323-6
DOI :
10.1109/HPCA.1998.650572