Platform-based MPEG-4 video encoder SOC design

Author

Chang, Yung-Chi ; Chao, Wei-Min ; Chen, Liang-Gee

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

fYear

2004

fDate

13-15 Oct. 2004

Firstpage

251

Lastpage

256

Abstract

An MPEG-4 video coding SOC design is presented. We adopt a platform-based architecture with an embedded RISC core and efficient memory organization. A motion estimator supporting predictive diamond search and spiral full search is implemented to provide a compromise between compression performance and design cost. The proposed data reuse scheme reduces the required memory access bandwidth. Several key modules are integrated into an efficient platform in a hardware/software codesign fashion. The cost-efficient video encoder SOC consumes 256.8 mW at 40 MHz and achieves real-time encoding of 30 CIF (352×288) frames per second.

Keywords

computational complexity; data compression; hardware-software codesign; motion estimation; reduced instruction set computing; search problems; storage management; system-on-chip; video coding; 101376 pixel; 256.8 mW; 288 pixel; 352 pixel; 40 MHz; MPEG-4 video encoder; SOC design; compression performance; computational complexity; data reuse scheme; embedded RISC core; hardware-software codesign; memory access bandwidth; memory organization; motion estimation; platform-based architecture; predictive diamond search; spiral full search; Bandwidth; Costs; Encoding; Hardware; MPEG 4 Standard; Motion estimation; Reduced instruction set computing; Spirals; Video coding; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing Systems, 2004. SIPS 2004. IEEE Workshop on

Print_ISBN

0-7803-8504-7

Type

conf

DOI

10.1109/SIPS.2004.1363058

Filename

1363058