DocumentCode :
2012465
Title :
Design challenges for nano-scale devices
Author :
Belleville, Marc ; Thomas, Olivier ; Valentian, Alexandre ; Clermidy, Fabien
Author_Institution :
LETI, CEA, Grenoble, France
fYear :
2012
fDate :
17-21 Sept. 2012
Firstpage :
69
Lastpage :
72
Abstract :
This paper presents an overview of the design challenges and solutions under development for Nano-scale technologies. Major applications requirements and nano-technologies design limitations are introduced. Adaptive techniques aiming to cope with variations and to track an optimal energy operating point are presented.
Keywords :
integrated circuit design; nanoelectronics; adaptive technique; nano-scale device design; nano-scale technology; nanotechnologies design limitation; optimal energy operating point; CMOS integrated circuits; Nanoscale devices; Performance evaluation; Power supplies; Random access memory; Sensors; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference (ESSDERC), 2012 Proceedings of the European
Conference_Location :
Bordeaux
ISSN :
1930-8876
Print_ISBN :
978-1-4673-1707-8
Electronic_ISBN :
1930-8876
Type :
conf
DOI :
10.1109/ESSDERC.2012.6343335
Filename :
6343335
Link To Document :
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