Stability and performance optimization of InGaAs-OI and GeOI hetero-channel SRAM cells

InGaAs-OI and GeOI SRAM cells using optimized threshold voltage (Vt) design to enhance the intrinsic variation immunity of high-performance (super-threshold) and low-voltage (near-/sub-threshold) 6T SRAM cells are presented. For low-voltage SRAMs operating at low Vdd, low-Vt design shows smaller variability while the design trade-off between performance and leakage should be considered. For high-performance SRAMs operating at high Vdd, high-Vt design shows smaller variability. Moreover, compared with the SOI SRAMs with high-Vt design, InGaAs-OI/GeOI hetero-channel SRAM cells with high-Vt design exhibit improved Read/Write stability and performance, and maintain comparable RSNM variations for the high-performance SRAM applications.