Title :
Triple-mode MAP/VA timing analysis for unified convolutional/turbo decoder design
Author :
Li, Fan-Min ; Shen, Pei-Ling ; Wu, An-Yeu Andy
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
To satisfy the advanced FEC standard that performs both convolutional coding and turbo coding, a unified convolutional/turbo decoder is needed. The timing of both Viterbi and MAP algorithms are analyzed. We introduce three techniques, including interleaving, pointer, and parallel schemes, which can be used in timing charts to reduce memory or increase throughput. In recent works, several timing charts of VA or MAP have been presented, but there is no combined timing analysis of both algorithms. We propose two types of triple-mode MAP/VA timing charts by complementing the idle times of each other.
Keywords :
Viterbi decoding; convolutional codes; digital communication; forward error correction; maximum likelihood decoding; timing; turbo codes; MAP algorithm; Viterbi algorithm; advanced FEC standard; convolutional code; digital communication systems; interleaving scheme; parallel scheme; pointer scheme; timing charts; triple-mode MAP/VA timing analysis; turbo code; unified convolutional/turbo decoder; Algorithm design and analysis; Convolutional codes; Interleaved codes; Iterative algorithms; Iterative decoding; Maximum likelihood decoding; Throughput; Timing; Turbo codes; Viterbi algorithm;
Conference_Titel :
Signal Processing Systems, 2004. SIPS 2004. IEEE Workshop on
Print_ISBN :
0-7803-8504-7
DOI :
10.1109/SIPS.2004.1363063