Fault-tolerant computation within complex FIR filters

Author

Chan, P. ; Jullien, G.A. ; Imbert, L. ; Dimitrov, V.S. ; McGibney, G.H.

Author_Institution

Adv. Technol. Inf. Process. Syst. Lab., Calgary Univ., Alta., Canada

fYear

2004

fDate

13-15 Oct. 2004

Firstpage

316

Lastpage

320

Abstract

In this paper we propose an architecture for the implementation of fault-tolerant computation within a high throughput multirate equalizer for all asymmetrical wireless LAN. The area overhead is minimized by exploiting the algebraic structure of the modulus replication residue number system (MRRNS). We demonstrate that for our system the area cost to correct a fault in a single computational channel is 82.7%. Generalized results for single error correction showing significant area savings are also presented.

Keywords

FIR filters; equalisers; error correction; fault tolerant computing; residue number systems; wireless LAN; MRRNS; algebraic structure; area overhead minimization; asymmetrical wireless LAN; complex FIR filters; fault-tolerant computation; high throughput multirate equalizer; modulus replication residue number system; single error correction; Adaptive filters; Computer architecture; Fault tolerance; Fault tolerant systems; Finite impulse response filter; Frequency; Laboratories; Matched filters; Polynomials; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing Systems, 2004. SIPS 2004. IEEE Workshop on

Print_ISBN

0-7803-8504-7

Type

conf

DOI

10.1109/SIPS.2004.1363069

Filename

1363069