DocumentCode :
2012886
Title :
Tunnel FET with non-uniform gate capacitance for improved device and circuit level performance
Author :
Alper, Cem ; De Michielis, Luca ; Dagtekin, Nilay ; Lattanzio, Livio ; Ionescu, Adrian M.
Author_Institution :
Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland
fYear :
2012
fDate :
17-21 Sept. 2012
Firstpage :
161
Lastpage :
164
Abstract :
We propose and report the significant improvement obtained by a non-uniform gate capacitance made by appropriate combination of high-k and low-k regions over the tunneling and the channel regions of a heterostucture TFET (called HKLKTFET). In addition to significantly enhanced ION and subthreshold swing, we find that this structure offers great improvements for the dynamic switching energy (66% saving) and propagation delay (~3X fast operation) compared to a heterostructure TFET (HeTFET) due to the reduction of the Miller effect. We compare and benchmark the proposed device against a 65nm low stand-by power (LSP) CMOS technology, and we show that at a supply voltage of VDD = 0.4V , TFETs can have smaller propagation delays compared to CMOS operating in the subthreshold region.
Keywords :
capacitance; high electron mobility transistors; tunnel transistors; ION; Miller effect; channel region; circuit level performance; dynamic switching energy; heterostucture TFET; high-k region; low-k region; nonuniform gate capacitance; propagation delay; subthreshold swing; tunnel FET; tunneling; voltage 4 V; CMOS integrated circuits; Capacitance; High K dielectric materials; Logic gates; MOSFETs; Switches; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference (ESSDERC), 2012 Proceedings of the European
Conference_Location :
Bordeaux
ISSN :
1930-8876
Print_ISBN :
978-1-4673-1707-8
Electronic_ISBN :
1930-8876
Type :
conf
DOI :
10.1109/ESSDERC.2012.6343358
Filename :
6343358
Link To Document :
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