DocumentCode
2013019
Title
TCAD degradation modeling for LDMOS transistors
Author
Reggiani, S. ; Barone, G. ; Gnani, E. ; Gnudi, A. ; Poli, S. ; Chuang, M.-Y. ; Tian, W. ; Wise, R.
Author_Institution
ARCES & DEIS, Univ. of Bologna Bologna, Bologna, Italy
fYear
2012
fDate
17-21 Sept. 2012
Firstpage
185
Lastpage
188
Abstract
Physically-based models of hot-carrier stress and dielectric field-enhanced thermal damage have been incorporated in the framework of a TCAD tool with the aim of investigating the electrical stress degradation in integrated power devices over an extended range of stress biases and ambient temperatures. An analytical formulation of the distribution function accounting for the effects of the full band structure has been employed for the hot-carrier modeling. A quantitative understanding of the kinetics and local distribution of degradation are achieved, and the drift of the most relevant parameters is nicely predicted on an extended range of stress times and biases.
Keywords
MOSFET; hot carriers; technology CAD (electronics); LDMOS transistor; TCAD degradation modeling; dielectric field-enhanced thermal damage; electrical stress degradation; full band structure; hot-carrier modeling; hot-carrier stress; integrated power device; kinetics; local distribution; physically-based model; stress biases; Degradation; Distribution functions; Electric fields; Hot carriers; Mathematical model; Silicon; Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research Conference (ESSDERC), 2012 Proceedings of the European
Conference_Location
Bordeaux
ISSN
1930-8876
Print_ISBN
978-1-4673-1707-8
Electronic_ISBN
1930-8876
Type
conf
DOI
10.1109/ESSDERC.2012.6343364
Filename
6343364
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