Title :
An algebraic model for computing the maximum throughput of pipelined protocol processors
Author :
Cardona, Mario ; Satake, Tadashi ; Tsujii, Shigeo
Author_Institution :
Dept. of Electr. & Electron. Eng., Tokyo Inst. of Technol., Japan
fDate :
29 Nov-2 Dec 1993
Abstract :
Presents an algebraic model for computing the maximum throughput of pipelined protocol processors. The model supports concurrent processing at pipeline stages, packet segmentation/assembling, and packet processing time dependent on packet length. Two examples are given. In the first example. The throughput of a single pipeline stage is computed. In the second example, the maximum throughput achievable by an idealized pipelined processor for FDDI, class I LLC, IF, and TCP is computed. Also, the authors show that the formula given in Hirata et al. (1992) is a special case of a formula derived in the present paper
Keywords :
FDDI; channel capacity; data communication systems; digital communication systems; open systems; packet switching; performance evaluation; pipeline processing; protocols; FDDI; IF; TCP; algebraic model; class I LLC; concurrent processing; idealized pipelined processor; maximum throughput; packet length; packet processing time; packet segmentation; packet segmentationassembling; pipelined protocol processors; single pipeline stage; Assembly; Data communication; FDDI; Laboratories; Parallel processing; Pipeline processing; Protocols; TCPIP; Throughput; Token networks;
Conference_Titel :
Global Telecommunications Conference, 1993, including a Communications Theory Mini-Conference. Technical Program Conference Record, IEEE in Houston. GLOBECOM '93., IEEE
Conference_Location :
Houston, TX
Print_ISBN :
0-7803-0917-0
DOI :
10.1109/GLOCOM.1993.318382
