Title : 
Virtual Point-to-Point Links in Packet-Switched NoCs
         
        
            Author : 
Modarressi, Mehdi ; Sarbazi-Azad, Hamid ; Tavakkol, Arash
         
        
            Author_Institution : 
IPM Sch. of Comput. Sci., Sharif Univ. of Technol., Tehran
         
        
        
        
        
        
            Abstract : 
A method to setup virtual point-to-point links between the cores of a packet-switched network-on-chip is presented in this paper which aims at reducing the NoC power consumption and delay. The router architecture proposed in this paper provides packet-switching, as well as a number of virtual point-to-point, or VIP (VIrtual Point-to-point) for short, connections. This is achieved by designating one virtual channel at each physical channel of a router to bypass the router pipeline. The mapping and routing algorithm exploits these virtual channels and tries to virtually connect the source and destination nodes of high-volume communication flows during task-graph mapping and route selection phase of the NoC design process. The evaluation results show a significant reduction in power and latency over a traditional packet-switched NoC.
         
        
            Keywords : 
graph theory; integrated circuit design; logic design; low-power electronics; network routing; network-on-chip; packet switching; network-on-chip; packet-switched NoC design; power consumption; router architecture; task-graph mapping; virtual point-to-point link; Computer Society; Computer science; Delay; Latches; Network-on-a-chip; Pipelines; Process design; Scalability; Very large scale integration; Virtual colonoscopy; Application-Specific; Low-Power; NoC;
         
        
        
        
            Conference_Titel : 
Symposium on VLSI, 2008. ISVLSI '08. IEEE Computer Society Annual
         
        
            Conference_Location : 
Montpellier
         
        
            Print_ISBN : 
978-0-7695-3291-2
         
        
            Electronic_ISBN : 
978-0-7695-3170-0
         
        
        
            DOI : 
10.1109/ISVLSI.2008.76