Compensating Algorithmic-Loop Performance Degradation in Asynchronous Circuits Using Hardware Multi-threading

Asynchronous circuits have shown their advantage in many applications. This paper is an effort to cope with one of the major performance bounds of asynchronous circuits; the algorithmic loop dependence. While many techniques are developed to improve the performance of asynchronous circuits, most of these works are bounded by algorithmic loop dependence. An automated technique for performance improvement which can overcome the algorithmic loop dependence will be presented, as the results show the technique can effectively improve performance per area up to 140%.