DocumentCode :
2013608
Title :
Silicon-on-insulator technology impacts on SRAM testing
Author :
Adams, R. Dean ; Shephard, Phil, III
Author_Institution :
Int. Bus. Machines, Essex Junction, VT, USA
fYear :
2000
fDate :
2000
Firstpage :
43
Lastpage :
47
Abstract :
Silicon-on-insulator (SOI) SRAMs have different characteristics from those fabricated in traditional bulk silicon. Fault models and sensitivities must be considered when testing for SOI manufacturing defects. Circuit details of SOI SRAMs that relate to testing are presented and a new pattern is described which covers the related fault models
Keywords :
SRAM chips; fault simulation; integrated circuit testing; production testing; silicon-on-insulator; SRAM testing; fault models; manufacturing defects; sensitivities; silicon-on-insulator technology; Decision support systems; FETs; Random access memory; Silicon on insulator technology; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 2000. Proceedings. 18th IEEE
Conference_Location :
Montreal, Que.
ISSN :
1093-0167
Print_ISBN :
0-7695-0613-5
Type :
conf
DOI :
10.1109/VTEST.2000.843825
Filename :
843825
Link To Document :
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