• DocumentCode
    2013942
  • Title

    The Design of Reversible Multiplier Using Ancient Indian Mathematics

  • Author

    Banerjee, Adrish ; Das, Debesh K.

  • Author_Institution
    Dept. of CSE, Jadavpur Univ. Jadavpur, Kolkata, India
  • fYear
    2013
  • fDate
    10-12 Dec. 2013
  • Firstpage
    31
  • Lastpage
    35
  • Abstract
    The main aim of this paper is to design binary as well as decimal reversible multiplier using the well known Nikhilamformula of ancient Indian mathematics. Reversible logic is an important alternate to reduce the power. However its design demands some additional inputs and garbage outputs. Our design offers less number of ancillary inputs and garbage outputs in comparison to the earlier similar work.
  • Keywords
    circuit optimisation; multiplying circuits; Nikhilam formula; ancient Indian mathematics; reversible logic; reversible multiplier; Adders; Arrays; Equations; Logic gates; Optimization; Switches; BCD; Multiplier; Reversible logic;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic System Design (ISED), 2013 International Symposium on
  • Conference_Location
    Singapore
  • Print_ISBN
    978-0-7695-5143-2
  • Type

    conf

  • DOI
    10.1109/ISED.2013.13
  • Filename
    6808636
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2013942