Electrical performance of flip-chip PBGA vs. CBGA

The measure of package performance depends on the specific application. A high speed, high I/O application poses many restrictions on the required performance in terms of thermal management, reliability as well as electrical integrity. Electrical performance issues have become a very significant performance figure with the increasing circuit density and faster rise time contrary to the traditional view of a package. The drive towards higher chip I/O, reducing device dimensions and demand for lower inductance is forcing many to abandon the traditional chip bonding techniques such as wire-bonding and pursue flip-chip techniques (i.e,, C4). The chip carrying substrate facilitates the fanning-out of the I/Os, powering up the chip, and providing I/O interface to the next level. A host of substrate technologies are available, In this paper we look at the trade offs between PBGA (Plastic Ball Grid Array) and CBGA (Ceramic Ball Grid Array) solutions from an electrical performance, package design and application point of view