Title :
4-6 Bit Variable Resolution ADC
Author :
Varshney, S. ; Goswami, Mausumi ; Singh, B. Raja
Author_Institution :
Dept. of Microelectron., Indian Inst. of Inf. Technol., Allahabad, India
Abstract :
A low power variable resolution analog-to-digital converter (ADC) architecture has been proposed in a 45-nm CMOS technology. The design uses only 6 comparators for achieving the required conversion and thus saves huge amount of area in comparison to conventional flash ADC (which requires 2n comparators for same bits). The proposed ADC when designed for 4 - 6 bits, exhibit a SNR of 35.9 dB and SNDR of 35.4 dB and achieves a maximum speed of 1.4 GS/s. The ADC dissipates 80 μW, 96 μW and 1.15 mW power for 4, 5 and 6 bits respectively.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; comparators (circuits); CMOS technology; comparators; flash ADC; low power variable resolution analog-to-digital converter; power 1.15 mW; power 80 muW; power 96 muW; size 45 nm; word length 4 bit to 6 bit; CMOS integrated circuits; CMOS technology; Multiplexing; Signal resolution; Signal to noise ratio; Switches; Transient response; ADC; comparators; multiplexers; variable resolution;
Conference_Titel :
Electronic System Design (ISED), 2013 International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-0-7695-5143-2
DOI :
10.1109/ISED.2013.21
