DocumentCode
2014158
Title
ESIM: a multimodel design error and fault simulator for logic circuits
Author
Al-Asaad, Hussain ; Hayes, John P.
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
fYear
2000
fDate
2000
Firstpage
221
Lastpage
228
Abstract
ESIM is a simulation tool that integrates logic fault and design error simulation for logic circuits. It targets several design error and fault models, and uses a novel mix of simulation algorithms based on parallel-pattern evaluation, multiple error activation, single fault propagation, and critical path tracing. Several experiments are discussed to demonstrate the power of ESIM
Keywords
circuit simulation; combinational circuits; critical path analysis; digital simulation; fault simulation; integrated circuit design; logic CAD; logic simulation; ESIM; critical path tracing; fault simulator; logic circuits; multimodel design error simulator; multiple error activation; parallel-pattern evaluation; simulation algorithms; simulation tool; single fault propagation; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer errors; Computer simulation; Design engineering; Error correction; Laboratories; Logic circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2000. Proceedings. 18th IEEE
Conference_Location
Montreal, Que.
ISSN
1093-0167
Print_ISBN
0-7695-0613-5
Type
conf
DOI
10.1109/VTEST.2000.843849
Filename
843849
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