A Novel Physical Synthesis Methodology in the VLSI Design Automation by Introducing Dynamic Library Concept

NRE costs and Time-to-Market are the two contributing factors in current IC industries to keep up with the competition with the embedded systems market. To reduce both is a challenge to the research community to come up with a design automation solution. Here, we propose a Design Automation methodology by introducing the concept of Dynamic Library Concept. The methodology uses the libraries of the layouts of the already designed blocks for the later use in further designs. Thereby, reducing the design time and cost associated with it. Here, we are presenting the preliminary findings by considering the standard full adder and 4-Bit adder examples.