Title :
The left edge algorithm and the tree growing technique in block-test scheduling under power constraints
Author :
Muresan, Vlad ; Wang, Xiongfei ; Muresan, Vlad ; Vladutiu, Mircea
Author_Institution :
Dublin City Univ., Ireland
Abstract :
The left-edge algorithm is adapted in this paper to deal with the problem of unequal-length block-test scheduling under power dissipation constraints. An extended tree growing technique is used in combination with the left-edge algorithm in order to improve the test concurrency under power dissipation limits. A test scheduling example is discussed highlighting further research directions towards an efficient system-level test scheduling algorithm
Keywords :
VLSI; built-in self test; integrated circuit testing; logic testing; low-power electronics; scheduling; trees (mathematics); left edge algorithm; power constraints; system-level test scheduling algorithm; test concurrency; tree growing technique; unequal-length block-test scheduling; Built-in self-test; Clocks; Concurrent computing; Digital systems; Logic testing; Performance evaluation; Power dissipation; Scheduling algorithm; System testing; Very large scale integration;
Conference_Titel :
VLSI Test Symposium, 2000. Proceedings. 18th IEEE
Conference_Location :
Montreal, Que.
Print_ISBN :
0-7695-0613-5
DOI :
10.1109/VTEST.2000.843873
