• DocumentCode
    2014876
  • Title

    A 6 GHz digital receiver using COTS prototyping boards

  • Author

    Tsakiris, N. ; Hall, Peter S. ; Herfurth, Simon ; Tan, Ping ; Brown, Kenneth

  • Author_Institution
    Electron. Warfare & Radar Div., Defence Sci. & Technol. Organ., Edinburgh, SA, Australia
  • fYear
    2013
  • fDate
    9-12 Sept. 2013
  • Firstpage
    537
  • Lastpage
    541
  • Abstract
    We have designed and tested a digital receiver suitable for the reception of 6 GHz instantaneous baseband signals. It is based on a Tektronix TADC-1000 12.5-GS/s 8-bit digitiser module, a Tektronix TIPA-3100 HAPS Interposer board and a Synopsys HAPS62-Virtex6 Prototyping Motherboard. This motherboard is also employed for filtering and signal processing. The ADC module uses an external clock from the interposer board and can accept a range of input clock frequencies between 1.6 and 3.125 GHz, resulting in sample rates of between 8 and 12.5 GS/s in single-channel mode. The external clock and digital data are supplied to and processed via the HAPS62 board. A 2048-channel weighted overlap-add (WOLA) and FFT structure separate the input signal into approximately 5-MHz sub-bands to allow subsequent high-resolution processing to obtain continuous spectral information over the input bandwidth. This system meets present-day demands on high-resolution wideband digital back-ends for RF spectrum monitoring. This technology could be part of the next generation wideband signal intercept systems for the future detection, classification and location of modern complex RF signals.
  • Keywords
    analogue-digital conversion; fast Fourier transforms; microwave receivers; signal processing; ADC module; COTS prototyping boards; FFT structure; RF spectrum monitoring; Synopsys HAPS62-Virtex6 prototyping motherboard; Tektronix TADC-1000; Tektronix TIPA-3100 HAPS interposer board; WOLA; digital receiver; digitiser module; filtering; frequency 1.6 GHz to 3.125 GHz; frequency 6 GHz; instantaneous baseband signals; next generation wideband signal intercept systems; signal processing; single-channel mode; weighted overlap-add; word length 8 bit; Bandwidth; Clocks; Field programmable gate arrays; Filter banks; RF signals; Radio frequency; Receivers; FFT; FPGA; digital receiver; high-resolution wideband backends; high-speed ADC;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Radar (Radar), 2013 International Conference on
  • Conference_Location
    Adelaide, SA
  • Print_ISBN
    978-1-4673-5177-5
  • Type

    conf

  • DOI
    10.1109/RADAR.2013.6652045
  • Filename
    6652045