DocumentCode :
2015021
Title :
Word-voter: a new voter design for triple modular redundant systems
Author :
Mitra, Subhasish ; McCluskey, Edward J.
Author_Institution :
Dept. of Electr. Eng., Stanford Univ., CA, USA
fYear :
2000
fDate :
2000
Firstpage :
465
Lastpage :
470
Abstract :
Redundancy techniques are commonly used to design dependable systems to ensure high reliability, availability and data integrity. Triple Modular Redundancy (TMR) is a widely used redundancy technique that masks faults. In a TMR system, we have three implementations of the same logic function and their outputs are voted using a voter circuit. In this paper, we present a new voter design called the Word-Voter that has some distinct advantages over the bit-by-bit voting schemes used in conventional TMR systems. This paper demonstrates the usefulness of the word-voter design in increasing the data integrity (reducing the probability of corrupt outputs) of TMR systems. The area and delay overhead of the word-voter design is compared to that of the bit-by-bit voter. An efficient design of a TMR-Simplex system using the word-voter is also presented
Keywords :
circuit reliability; data integrity; logic design; majority logic; redundancy; TMR-Simplex system; Word-Voter; area overhead; availability; data integrity; delay overhead; dependable systems; high reliability; majority voting circuit; triple modular redundancy; triple modular redundant systems; voter circuit; voter design; Added delay; Availability; Circuit faults; Electromagnetic interference; Logic functions; Redundancy; Voting;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 2000. Proceedings. 18th IEEE
Conference_Location :
Montreal, Que.
ISSN :
1093-0167
Print_ISBN :
0-7695-0613-5
Type :
conf
DOI :
10.1109/VTEST.2000.843880
Filename :
843880
Link To Document :
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