DocumentCode
2015513
Title
A programmable FIR filter for TV ghost cancellation
Author
Pao, Sammy ; Khoo, Kei-Yong ; Willson, Alan N., Jr.
Author_Institution
Integrated Circuits & Syst. Lab., California Univ., Los Angeles, CA, USA
Volume
1
fYear
1996
fDate
18-21 Aug 1996
Firstpage
133
Abstract
A compact 64-tap programmable FIR filter, suitable for TV ghost cancellation, has been designed, fabricated and tested. The design uses carry-save add-shift (CSAS) multipliers, to achieve area efficiency, and an internally generated self-timed clock, to achieve timing efficiency. The prototype chip is implemented in a die area of 12.6 mm2 using a 0.8-μm CMOS process and can operate at up to 18 MHz, with a 5-V supply
Keywords
CMOS digital integrated circuits; FIR filters; digital filters; interference suppression; multiplying circuits; programmable filters; television interference; timing; 0.8 micron; 18 MHz; 5 V; CMOS process; TV ghost cancellation; area efficiency; carry-save add-shift multipliers; die area; internally generated self-timed clock; programmable FIR filter; timing efficiency; CMOS process; Circuit testing; Clocks; Equalizers; Finite impulse response filter; IIR filters; Prototypes; Signal processing; TV; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996., IEEE 39th Midwest symposium on
Conference_Location
Ames, IA
Print_ISBN
0-7803-3636-4
Type
conf
DOI
10.1109/MWSCAS.1996.594057
Filename
594057
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