Cost effective Wafer-Level Chip Size Package technology and application for high speed wireless communications

Cost effective Ku-band up-mixer and down-mixer MMIC´s, that use a three-dimensional MMIC technology optimized for flip-chip implementation, are presented. The MMIC structure incorporates inverse TFMS lines so that a ground metal can be applied to cover the whole chip surface except for interconnect pads. Among multi polyimide and SiN layers, four wiring metal layers are composed. Hence, these MMIC chips require no package, as well as can be directly assembled on PC board. The up-mixer MMIC is composed of a pair of balanced mixers, which are doubly balanced with additional quadrature couplers, and a LO amplifier. The downmixer is composed of an image-rejection mixer, a LO amplifier and a low-noise amplifier with a noise figure of 3.2 dB. These amplifiers are very linear and provide an OIP3 of nearly 25 dBm. The up-mixer exhibits a conversion loss of the 12 dB, the IMD ratios of nearly -55 dBc at -5 dBm 2-tone IF input. The LO-to-RF leakage suppression is as well as -30 dBc. The down-mixer exhibits a conversion gain of 6.5 dB, a noise figure of nearly 3.7 dB, and an IIP3 of 0 dBm to 5 dBm between 12 GHz and 16 GHz. The die size of them is 2.4 mm times 2.4 mm and consumes 36 mA and 72 mA, respectively, fed from 5 V power supply.