Title :
The effect on RISC performance of register set size and structure versus code generation strategy
Author :
Bradlee, David G. ; Eggers, Susan J. ; Henry, Robert R.
Author_Institution :
Uuiversity of Washington
Keywords :
Computer science; Contracts; Coprocessors; Delay; Performance loss; Permission; Pipelines; Processor scheduling; Reduced instruction set computing; Registers;
Conference_Titel :
Computer Architecture, 1991. The 18th Annual International Symposium on
Print_ISBN :
0-89791-394-9
DOI :
10.1109/ISCA.1991.1021625
