Title :
A new data retention mechanism after endurance stress on flash memory
Author :
Kameyama, Hideaki ; Okuyama, Yutaka ; Kamohara, Shiro ; Kubota, Katsuhiko ; Kume, Hitoshi ; Okuyama, Kousuke ; Manabe, Yukiko ; Nozoe, Atsushi ; Uchida, Hiroyuki ; Hidaka, Mitsumori ; Ogura, Katsutoshi
Author_Institution :
Hitachi Kodaira Semicond. Ltd., Tokyo, Japan
Abstract :
We propose a new data retention model after endurance stress that may be explained as a combination of two retention mechanisms. One inherent retention characteristic is ruled by thermionic emission and is dominant above 150 C. The other retention mechanism is dominant below 85 to 125 C and is controlled by anomalous SILC. We have clarified that the data retention properties after P/E cycling were well fitted by the hopping conduction model. In particular, the presence of traps generated by excessive P/E cycling played a significant role in the temperature dependence of the retention lifetime
Keywords :
CMOS memory circuits; electron traps; environmental testing; flash memories; hole traps; hopping conduction; integrated circuit modelling; integrated circuit reliability; leakage currents; -55 to 175 C; CMOS stacked gate flash memory cells; P/E cycling; anomalous SILC; data retention mechanism; endurance stress; flash memory; hopping conduction model; modeling; retention lifetime; temperature dependence; thermionic emission; trap generation; Flash memory; Flash memory cells; Integrated circuit modeling; Life estimation; Lifetime estimation; Monitoring; Nonvolatile memory; Semiconductor device modeling; Stress; Temperature dependence;
Conference_Titel :
Reliability Physics Symposium, 2000. Proceedings. 38th Annual 2000 IEEE International
Conference_Location :
San Jose, CA
Print_ISBN :
0-7803-5860-0
DOI :
10.1109/RELPHY.2000.843914
