• DocumentCode
    2016180
  • Title

    A VLSI self-compacting buffer for DAMQ communication switches

  • Author

    Delgado-Frias, José G. ; Diaz, Richard

  • Author_Institution
    Dept. of Electr. Eng., State Univ. of New York, Binghamton, NY, USA
  • fYear
    1998
  • fDate
    19-21 Feb 1998
  • Firstpage
    128
  • Lastpage
    133
  • Abstract
    This paper describes a novel VLSI CMOS implementation of a self-compacting buffer (SCB) for the dynamically allocated multi-queue (DAMQ) switch architecture. The SCB is a scheme that dynamically allocates data regions within the input buffer for each output channel. The proposed implementation provides a high-performance solution to buffered communication switches that are required in interconnection networks. This performance comes from not only the DAMQ approach but also the pipelined implementation and novel circuitry. The major components of the SCB are described in detail in this paper. The system has the capability of performing a read, a write, or a simultaneous read/write operation per cycle due to its pipelined architecture
  • Keywords
    CMOS memory circuits; VLSI; buffer storage; multiprocessor interconnection networks; pipeline processing; timing; DAMQ communication switches; VLSI CMOS implementation; VLSI self-compacting buffer; dynamically allocated multi-queue switch architecture; interconnection networks; pipelined architecture; Buffer storage; Circuits; Communication switching; Communication system control; Hardware; Multiprocessor interconnection networks; Packet switching; Routing; Space technology; Switches; Timing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on
  • Conference_Location
    Lafayette, LA
  • ISSN
    1066-1395
  • Print_ISBN
    0-8186-8409-7
  • Type

    conf

  • DOI
    10.1109/GLSV.1998.665212
  • Filename
    665212