60GHz CMOS divide-by-5 injection-locked frequency divider with an open-stub-loaded floating-source injector

A new injector topology is adopted for the design of a 60-GHz CMOS divide-by-5 injection-locked frequency divider (ILFD). The topology is based on a distributed-element harmonic termination by an open-stub structure connected to the floating source end of the differential injection pair. With this topology together with an N-MOS cross-coupled oscillator core, the supply voltage and power consumption of the divider can be greatly reduced. A test circuit is implemented in a 90-nm CMOS process. With the added λ/4 open stub, the simulated frequency locking range of the designed ILFD with the distributed-element harmonic termination scheme has been greatly extended over 70%. The measured power consumption is 3.75 mW at a supply voltage of 0.6 V and the locking range is 4.1 GHz. A good figure of merit (FOM) of 69.4 is achieved.