• DocumentCode
    2016480
  • Title

    CAD tools for managing signal integrity and congestion simultaneously

  • Author

    Mehrotra, Sharad ; Franzon, Paul ; Bilbro, Griff ; Steer, Michael

  • Author_Institution
    Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
  • fYear
    1994
  • fDate
    2-4 Nov 1994
  • Firstpage
    30
  • Lastpage
    32
  • Abstract
    An efficient computer-aided approach is presented that manages delay, signal integrity and routing congestion simultaneously in Printed Circuit Boards and Multichip Modules. The approach is based on use of the Signal Integrity Advisor in conjunction with a global router. The tools have been developed as part of a complete design optimization tool-set spanning partitioning, placement, routing and re-routing. It is also shown how the Signal Integrity Advisor can be used to produce wiring rules for a conventional router
  • Keywords
    circuit CAD; CAD tools; Signal Integrity Advisor; design optimization tool-set; global router; multichip modules; partitioning; placement; printed circuit boards; re-routing; routing congestion; signal integrity; wiring rules; Computational modeling; Delay; Design optimization; Engineering management; Equations; Printed circuits; Routing; Signal design; Signal processing; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Performance of Electronic packaging, 1994., IEEE 3rd Topical Meeting on
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    0-7803-2411-0
  • Type

    conf

  • DOI
    10.1109/EPEP.1994.594061
  • Filename
    594061