DocumentCode
2016723
Title
Predictive methodology for high-performance networking
Author
Foag, Jürgen ; Wild, Thomas ; Pazos, Nuria ; Brunnbauer, Winthir
Author_Institution
Inst. for Integrated Circuits, Tech. Univ. Munich, Germany
fYear
2002
fDate
2002
Firstpage
169
Lastpage
174
Abstract
Networking devices have to offer short processing latencies and flexibility concerning the supported networking protocols and applications. The input packet-processing flow in conventional networking node devices follows a serial or a layer-specific pseudo-parallel method, serialized by the data dependencies of the inherent layer protocol types. This article describes a new methodology, which is based on the principles of branch prediction and speculative execution in microprocessors, for latency reduced input packet processing in a networking device. Through the use of protocol stack prediction, in combination with speculative protocol layer processing, a networking system may realize a mean system processing time reduction of up to 40 percent in a real networking environment in comparison to conventional processing methodologies.
Keywords
computer networks; parallel architectures; performance evaluation; protocols; queueing theory; branch prediction; high-performance networking; latency reduced input packet processing; networking devices; networking protocols; predictive methodology; protocol stack; queueing; speculative protocol layer processing; system processing time reduction; Delay; Integrated circuit technology; Microprocessors; Predictive models; Protocols; Queueing analysis; Real time systems; Telecommunication traffic; Throughput; Traffic control;
fLanguage
English
Publisher
ieee
Conference_Titel
Computers and Communications, 2002. Proceedings. ISCC 2002. Seventh International Symposium on
ISSN
1530-1346
Print_ISBN
0-7695-1671-8
Type
conf
DOI
10.1109/ISCC.2002.1021674
Filename
1021674
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