• DocumentCode
    2016766
  • Title

    Moore´s Law: A CMOS Scaling Perspective

  • Author

    Tyagi, S.

  • Author_Institution
    Intel Corp., Bangalore
  • fYear
    2007
  • fDate
    11-13 July 2007
  • Firstpage
    10
  • Lastpage
    15
  • Abstract
    In this paper we presented a retrospective on Moore´s law, highlighting the salient feature of industry leading 65nm CMOS technology for high performance logic, and highlighted future challenges and approaches to overcome those.
  • Keywords
    CMOS integrated circuits; CMOS scaling; CMOS technology; Moore law; Annealing; CMOS technology; Capacitive sensors; Implants; MOS devices; MOSFETs; Moore´s Law; Switches; Thermal stresses; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Physical and Failure Analysis of Integrated Circuits, 2007. IPFA 2007. 14th International Symposium on the
  • Conference_Location
    Bangalore
  • Print_ISBN
    978-1-4244-1014-9
  • Type

    conf

  • DOI
    10.1109/IPFA.2007.4378049
  • Filename
    4378049
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2016766