Title :
Moore´s Law: A CMOS Scaling Perspective
Author_Institution :
Intel Corp., Bangalore
Abstract :
In this paper we presented a retrospective on Moore´s law, highlighting the salient feature of industry leading 65nm CMOS technology for high performance logic, and highlighted future challenges and approaches to overcome those.
Keywords :
CMOS integrated circuits; CMOS scaling; CMOS technology; Moore law; Annealing; CMOS technology; Capacitive sensors; Implants; MOS devices; MOSFETs; Moore´s Law; Switches; Thermal stresses; Transistors;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2007. IPFA 2007. 14th International Symposium on the
Conference_Location :
Bangalore
Print_ISBN :
978-1-4244-1014-9
DOI :
10.1109/IPFA.2007.4378049
