• DocumentCode
    2016941
  • Title

    A strategy to analyze soft reliability issues detected by Iddq measurements

  • Author

    Osterreicher, I. ; Nowak, C. ; Eckl, S. ; Tippelt, B. ; Werner, W.

  • Author_Institution
    Dresden GmbH & Co. OHG, Dresden
  • fYear
    2007
  • fDate
    11-13 July 2007
  • Abstract
    This paper first explains how this algorithm is applied to reject as many suspicious parts as possible and not throwing away any good parts at the same time. The most interesting question for the failure analyst will be answered in the main part: What kind of defects, if any, can be found on the rejected (but functional) chips, that could have an impact on reliability? The failure analysis flow based on devices failing the delta IDDQ test is shown and a variety of physical defects that can be found with this method is presented. In addition the benefit for physical failure analysis will be explained.
  • Keywords
    circuit reliability; failure analysis; logic circuits; logic testing; Iddq measurements; physical failure analysis; soft reliability issues;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Physical and Failure Analysis of Integrated Circuits, 2007. IPFA 2007. 14th International Symposium on the
  • Conference_Location
    Bangalore
  • Print_ISBN
    978-1-4244-1014-9
  • Type

    conf

  • DOI
    10.1109/IPFA.2007.4378056
  • Filename
    4378056