Title :
Modeling of shift register-based ATM switch
Author :
Agarwal, Sandeep ; El Guibaly, F.
Author_Institution :
Dept. of Electr. & Comput. Eng., Victoria Univ., BC, Canada
Abstract :
In this paper, we present the modeling of shift register-based ATM switch to find the cell loss probability, throughput and delay. The results are compared with other switch architectures based on input queueing, input smoothing, output queueing and completely shared buffering. It is observed that although our switch is an input-buffered switch, its performance is better than other switches based on traditional queuing approaches
Keywords :
asynchronous transfer mode; delays; electronic switching systems; probability; queueing theory; shift registers; switching networks; cell loss probability; delay; input queueing; input smoothing; modeling; output queueing; shared buffering; shift register-based ATM switch; switch architecture; throughput; Asynchronous transfer mode; Computer architecture; Delay; Numerical simulation; Protocols; Scheduling; Shift registers; Smoothing methods; Switches; Throughput;
Conference_Titel :
VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on
Conference_Location :
Lafayette, LA
Print_ISBN :
0-8186-8409-7
DOI :
10.1109/GLSV.1998.665216
