• DocumentCode
    2017487
  • Title

    A systolic VLSI architecture for multi-dimensional transforms

  • Author

    Kelliher, T.P. ; Irwin, M.J.

  • Author_Institution
    Dept. of Comput. Sci., Pennsylvania State Univ., University Park, PA, USA
  • Volume
    1
  • fYear
    1993
  • fDate
    27-30 April 1993
  • Firstpage
    365
  • Abstract
    A VLSI architecture for separable kernel multidimensional transforms is described. What is novel about the architecture is its data rotator, which is a hexagonal mesh of processors. The rotator is completely scalable and modular and is programmable with respect to d and the length of each dimension. The proposed architecture has an AT/sup 2/ figure of O(d/sup 2/n/sup 2/ log/sup 2/ n), where d is the dimensionality, n is the total number of elements in the data cube, and the precision of an element is assumed to be Theta (log n). The value of AT/sup 2/ for the rotator itself is O(n/sup 2/ log/sup 2/ n) for a single rotation, which is optimal. Multidimensional separable kernel transforms may be computed by performing d sets of 1-D transforms, each along a unique axis of the d-D data cube. A natural architecture for such problems consists of a number of 1-D transform processors and a rotator or transposer.<>
  • Keywords
    VLSI; multidimensional systems; systolic arrays; transforms; data rotator; hexagonal mesh of processors; separable kernel multidimensional transforms; systolic VLSI architecture;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, 1993. ICASSP-93., 1993 IEEE International Conference on
  • Conference_Location
    Minneapolis, MN, USA
  • ISSN
    1520-6149
  • Print_ISBN
    0-7803-7402-9
  • Type

    conf

  • DOI
    10.1109/ICASSP.1993.319131
  • Filename
    319131