Title :
A 100-3000MHz, up/ down-convert, +29dBm IIP3, 13dB NF, active mixer with integrated fractional-N PLL and VCO
Author :
Fujimori-Chen, Iliana ; Walker, Benjamin ; Broughton-Blanchard, Roxann ; Balboni, Ed
Author_Institution :
Analog Devices, Inc., Somerset, NJ, USA
Abstract :
This paper presents a broadband, high-dynamic range, active mixer with integrated PLL and VCO. The synthesizer uses a programmable integer-n/fractional-n PLL to generate an LO signal with an in-band phase noise FOM of -223 dBc/Hz/Hz. The 100-3000 MHz active mixer can be configured for up or down conversion. The mixer´s linearity can be boosted from +25 dBm to +29 dBm by increasing the bias current, and optimized for a wide range of input frequencies through a variable capacitor setting. Designed in Si-Ge 0.25 μm BiCMOS, the entire chip occupies 5.84 mm2 and consumes 250 mA from a 5 V supply.
Keywords :
BiCMOS analogue integrated circuits; Ge-Si alloys; UHF oscillators; VHF oscillators; mixers (circuits); phase locked loops; voltage-controlled oscillators; BiCMOS; LO signal; Si-Ge; VCO; active mixer; current 250 mA; frequency 100 MHz to 3000 MHz; in-band phase noise FOM; integrated fractional-N PLL; noise figure 13 dB; programmable integer-n-fractional-n PLL; size 0.25 mum; variable capacitor setting; voltage 5 V; Mixers; Phase frequency detector; Phase locked loops; Phase noise; Radio frequency; Voltage-controlled oscillators; BiCMOS; High Linearity; Mixers; PLL; VCO; Wideband;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2011 IEEE
Conference_Location :
Baltimore, MD
Print_ISBN :
978-1-4244-8293-1
Electronic_ISBN :
1529-2517
DOI :
10.1109/RFIC.2011.5940651
