DocumentCode
2017768
Title
Analysis and comparison of ripple carry full adders by speed
Author
Shubin, Vladimir V.
Author_Institution
Novosibirsk State Tech. Univ., Novosibirsk, Russia
fYear
2010
fDate
June 30 2010-July 4 2010
Firstpage
132
Lastpage
135
Abstract
This paper presents a new method for analysis and comparison of ripple carry full adders by speed on the basis of a new criterion “Equal Delay Capacity”. It has been shown that abstract values of compared one-bit adders delays, on which existing comparison methods are based, does not give the clear answer to a question about their behavior in N-bit devices. At the same time, comparison of the finished N-bit adders through a complete simulation cycle takes a lot of time, even if the most advanced software products are used. The proposed method allows quickly and exactly comparing various one-bit adders cell designs by speed for the specific application in devices.
Keywords
adders; carry logic; logic design; N-bit adders; N-bit devices; cell designs; equal delay capacity; one-bit adder delays; ripple carry full adders; Adders; Variable speed drives; CMOS; Full Adders; High-speed;
fLanguage
English
Publisher
ieee
Conference_Titel
Micro/Nanotechnologies and Electron Devices (EDM), 2010 International Conference and Seminar on
Conference_Location
Novosibirsk
Print_ISBN
978-1-4244-6626-9
Type
conf
DOI
10.1109/EDM.2010.5568768
Filename
5568768
Link To Document