DocumentCode
2017895
Title
A model to hardware comparison of simultaneous switching noise on a CMOS chip
Author
McCredie, B. ; Kuppinger, S. ; Katopis, G. ; Becker, W.D.
Author_Institution
IBM Corp., Poughkeepsie, NY, USA
fYear
1994
fDate
2-4 Nov 1994
Firstpage
43
Lastpage
45
Abstract
The simultaneous switching noise simulation and the comparison of those simulations to laboratory measurements of noise on a specially designed CMOS test chip on a multilayer ceramic SCM are presented
Keywords
integrated circuit noise; CMOS chip; multilayer ceramic SCM; noise simulation; simultaneous switching noise; Circuit noise; Circuit simulation; Hardware; Laboratories; Noise measurement; Packaging; Power distribution; Power supplies; Semiconductor device measurement; Semiconductor device modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic packaging, 1994., IEEE 3rd Topical Meeting on
Conference_Location
Monterey, CA
Print_ISBN
0-7803-2411-0
Type
conf
DOI
10.1109/EPEP.1994.594066
Filename
594066
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