DocumentCode
2018142
Title
Failure Analysis of I/O with ESD Protection Devices in Advanced CMOS Technologies
Author
Muhammad, Muhammad ; Gauthier, R. ; Chatty, K. ; Junjun Li ; Seguin, Chris
Author_Institution
IBM Semicond. Res., Essex Junction
fYear
2007
fDate
11-13 July 2007
Abstract
Many types of ESD protection devices such as diodes, NFETs, SCRs and RC-triggered power clamps having different failure mechanisms are used in advanced CMOS technologies. Circuit schematic analysis and SEM failure analysis are utilized to clearly predict and identify the failing I/O driver/receiver devices and/or the various ESD protection devices during an ESD event.
Keywords
CMOS integrated circuits; electrostatic discharge; failure analysis; integrated circuit reliability; CMOS technologies; ESD protection devices; SEM; circuit schematic analysis; electrostatic discharge; failure analysis; CMOS technology; Circuit analysis; Clamps; Driver circuits; Electrostatic discharge; Failure analysis; Protection; Research and development; Semiconductor diodes; Thyristors;
fLanguage
English
Publisher
ieee
Conference_Titel
Physical and Failure Analysis of Integrated Circuits, 2007. IPFA 2007. 14th International Symposium on the
Conference_Location
Bangalore
Print_ISBN
978-1-4244-1014-9
Type
conf
DOI
10.1109/IPFA.2007.4378100
Filename
4378100
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