Title :
Study of Time-Dependent Dielectric Breakdown on Gate Oxide Capacitors at High Temperature
Author :
Moonen, R. ; Vanmeerbeek, Piet ; Lekens, G. ; De Ceuninck, W. ; Moens, Peter ; Boutsen, J.
Author_Institution :
Hasselt Univ., Diepenbeek
Abstract :
Thin layers of silicon dioxide used as a dielectric for capacitors or as the gate oxide for a MOS semiconductor device are subject to a wear-out mechanism known as time- dependent dielectric breakdown (TDDB). This physical failure mechanism has always been of notable reliability matter in semiconductor industry because of the incessant tendency towards smaller devices. In this paper, the intrinsic oxide lifetime of 7.2 nm gate oxide capacitors (n-type) has been studied in, a wide electric field ranging from 8.3 to 13.2 MV/cm at high temperatures (up to 240degC). By means of a high resolution/high speed TDDB measurement technique, we performed TDDB tests with constant voltage stress (CVS) at different stress conditions of temperature and voltage. We particularly concentrated on the high temperature aspect of TDDB to answer the demands of new smart power technologies (Tjunc up to 225degC). It was found that the intrinsic oxide breakdown mechanism perfectly matches the anode hole injection (AHI) model (1/EOX model) at these high temperatures. In summary, this physical model is most convenient to extrapolate the intrinsic oxide lifetime from accelerated tests to normal at-use conditions.
Keywords :
MOS capacitors; electric breakdown; semiconductor device models; semiconductor device reliability; silicon compounds; MOS semiconductor device; SiO2 - Interface; TDDB measurement; anode hole injection model; constant voltage stress; extrapolate technique; gate oxide capacitors; intrinsic oxide lifetime; physical failure mechanism; size 7.2 nm; time-dependent dielectric breakdown; wear-out mechanism; Dielectric breakdown; Dielectric devices; Failure analysis; MOS capacitors; Semiconductor device reliability; Semiconductor devices; Silicon compounds; Stress; Temperature; Voltage;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2007. IPFA 2007. 14th International Symposium on the
Conference_Location :
Bangalore
Print_ISBN :
978-1-4244-1014-9
DOI :
10.1109/IPFA.2007.4378103