Title :
A self timed asynchronous router for an heterogeneous parallel machine
Author :
Senn, Eric ; Zavidovique, Bertrand
Author_Institution :
Centre Techn. des Moyens d´´Essais, Arcueil, France
Abstract :
This paper describes the implementation of the self timed asynchronous router in a parallel machine. The heterogenous architecture of the machine is outlined, then the need for asynchronous operations is explained, and the interest in an asynchronous network control. The specification and VLSI design of the router are exhibited with its measured performances
Keywords :
VLSI; asynchronous circuits; circuit layout CAD; high level synthesis; integrated circuit layout; network routing; parallel architectures; Phenix architecture; VLSI design; asynchronous network control; asynchronous operations; heterogeneous parallel machine; self-timed asynchronous router; Bandwidth; Computer architecture; Feeds; Image processing; Parallel machines; Performance evaluation; Prefetching; Random access memory; Registers; Routing; Throughput; Very large scale integration;
Conference_Titel :
VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on
Conference_Location :
Lafayette, LA
Print_ISBN :
0-8186-8409-7
DOI :
10.1109/GLSV.1998.665219
