Title :
A 55–67GHz power amplifier with 13.6% PAE in 65 nm standard CMOS
Author :
Wang, Tong ; Mitomo, Toshiya ; Ono, Naoko ; Watanabe, Osamu
Author_Institution :
Toshiba Corp., Kawasaki, Japan
Abstract :
A four-stage power amplifier (PA) covering 55-67GHz band is presented. The broadband performance is achieved owing to π-section interstage matching network. Three-stage-current-reuse topology is proposed to enhance efficiency. The amplifier has been fabricated in 65 nm digital CMOS. 18 dB power gain and 9.6 dBm saturated power (Psat) are achieved at 60GHz. The PA consumes current of 52 mA at 1.2 V supply voltage, and has a peak power-added efficiency (PAE) of 13.6%. To the best of the authors´ knowledge, this work shows the highest PAE among the reported CMOS PAs with less-than-1.2 V supply voltage and covering the worldwide 9GHz millimeter-wave band.
Keywords :
CMOS integrated circuits; millimetre wave integrated circuits; power amplifiers; wideband amplifiers; PAE; bandwidth 9 GHz; current 52 mA; efficiency 13.6 percent; frequency 55 GHz to 67 GHz; gain 18 dB; interstage matching network; power amplifier; power-added efficiency; size 65 nm; standard CMOS; three-stage-current-reuse topology; voltage 1.2 V; Bandwidth; CMOS integrated circuits; Conferences; Gain; Network topology; Power amplifiers; Topology; Broadband amplifiers; millimeter wave integrated circuits; power amplifiers;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2011 IEEE
Conference_Location :
Baltimore, MD
Print_ISBN :
978-1-4244-8293-1
Electronic_ISBN :
1529-2517
DOI :
10.1109/RFIC.2011.5940686
