Harmonics elimination in 5-level converters operating at very low switching frequency

This paper deals with the problem of harmonics reduction in cascaded multilevel converters throught Selective Harmonic Elimination. The method consists of an analytical procedure for identifying a set of switching angles capable of eliminating the desired harmonics and a graphical analysis tool allowing the identification of all valid solutions. Because of their industrial interest, relatively complex 5-level inverters have been considered, however the proposed method can be easily extended to a higher number of levels, too. The main advantage of the proposed approach is its simple implemention, which can be accomplished by using low cost digital signal processors. Simulations and experiments are presented for demonstrating the achievable results.