Soft-core embedded processor-based Built-In Self-Test of FPGAs: A case study

Author

Dutton, Bradley F. ; Stroud, Charles E.

Author_Institution

Dept. of Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA

fYear

2010

fDate

7-9 March 2010

Firstpage

313

Lastpage

317

Abstract

This paper presents the results of a case study which investigates the use of an embedded soft-core processor to perform Built-In Self-Test (BIST) of the logic resources in Xilinx Virtex-5 Field Programmable Gate Arrays (FPGAs). We show that the approach reduces the complexity of an external BIST controller and the number of external reconfigurations, making it particularly appealing for in-system testing of high-reliability and fault-tolerant systems with FPGAs. However, the overall test time is not improved due to an increase in the size of the required configuration files as a consequence of the inclusion of the soft-core embedded processor logic, whose relative irregularity results in less effective compression of configuration data files.

Keywords

embedded systems; fault tolerance; field programmable gate arrays; integrated circuit testing; parallel processing; BIST controller; FPGA; Xilinx Virtex-5 field programmable gate arrays; built-in self-test; configuration data files; fault-tolerant systems; in-system testing; logic resources; soft-core embedded processor logic; Built-in self-test; Circuit testing; Fabrics; Fault tolerant systems; Field programmable gate arrays; Logic testing; Programmable logic arrays; Reconfigurable logic; Routing; System testing; Built-In Self-Test; Fault Tolerance; Field Programmable Gate Array; System-Test; Virtex-5;

fLanguage

English

Publisher

ieee

Conference_Titel

System Theory (SSST), 2010 42nd Southeastern Symposium on

Conference_Location

Tyler, TX

ISSN

0094-2898

Print_ISBN

978-1-4244-5690-1

Type

conf

DOI

10.1109/SSST.2010.5442812

Filename

5442812